Memory-Efficient Hashed Page Tables-Reference-Cited by-同舟云学术

Memory-Efficient Hashed Page Tables

Published:2023-02 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
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Author:

Stojkovic Jovan¹,Mantri Namrata¹,Skarlatos Dimitrios²,Xu Tianyin¹,Torrellas Josep¹

Affiliation:

1. University of Illinois at Urbana-Champaign

2. Carnegie Mellon University

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10070856/10070923/10071061.pdf?arnumber=10071061

Reference91 articles.

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3. Accelerating two-dimensional page walks for virtualized systems

4. Dash

5. Inter-Core Cooperative TLB Prefetchers for Chip Multiprocessors;bhattacharjee;Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS),2010

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