Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings

Author:

Kanellopoulos Konstantinos1ORCID,Bera Rahul2ORCID,Stojiljkovic Kosta2ORCID,Bostanci F. Nisa1ORCID,Firtina Can1ORCID,Ausavarungnirun Rachata3ORCID,Kumar Rakesh4ORCID,Hajinazar Nastaran5ORCID,Sadrosadati Mohammad2ORCID,Vijaykumar Nandita6ORCID,Mutlu Onur2ORCID

Affiliation:

1. ETH Zurich, Switzerland

2. ETH Zürich, Switzerland

3. King Mongkut's University of Technology North Bangkok, Thailand

4. Norwegian University of Science and Technology (NTNU), Norway

5. Intel Labs, Canada

6. University of Toronto, Canada

Funder

Google, Huawei, Intel, Microsoft, VMware, Semiconductor Research Corporation, ETH Future Computing Laboratory

Publisher

ACM

Reference156 articles.

1. B Frey . PowerPC Architecture Book 2003 . www.ibm.com/developerworks/eserver/articles/archguide.html. B Frey. PowerPC Architecture Book 2003. www.ibm.com/developerworks/eserver/articles/archguide.html.

2. Abhishek Bhattacharjee . Breaking the Address Translation Wall By Accelerating Memory Replays . In IEEE Micro 2018 . Abhishek Bhattacharjee. Breaking the Address Translation Wall By Accelerating Memory Replays. In IEEE Micro 2018.

3. Steven M Hand. Self-Paging in the Nemesis Operating System. In OSDI 1999 . Steven M Hand. Self-Paging in the Nemesis Operating System. In OSDI 1999.

4. Kai Li and Paul Hudak. Memory Coherence in Shared Virtual Memory Systems. In TOCS 1989 . Kai Li and Paul Hudak. Memory Coherence in Shared Virtual Memory Systems. In TOCS 1989.

5. Andrew  W. Appel and Kai Li. Virtual Memory Primitives for User Programs. In ASPLOS 1991 . Andrew W. Appel and Kai Li. Virtual Memory Primitives for User Programs. In ASPLOS 1991.

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1. Direct Memory Translation for Virtualized Clouds;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2024-04-27

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