Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources

Author:

Kanellopoulos Konstantinos1ORCID,Nam Hong Chul1ORCID,Bostanci Nisa1ORCID,Bera Rahul1ORCID,Sadrosadati Mohammad1ORCID,Kumar Rakesh2ORCID,Bartolini Davide Basilio3ORCID,Mutlu Onur1ORCID

Affiliation:

1. ETH Zürich, Switzerland

2. Norwegian University of Science and Technology (NTNU), Norway

3. Huawei, Switzerland

Funder

Google, Huawei, Intel, Microsoft, VMware, SRC, EFCL

Publisher

ACM

Reference164 articles.

1. B Frey . PowerPC Architecture Book 2003 . www.ibm.com/developerworks/eserver/inproceedingss/archguide.html. B Frey. PowerPC Architecture Book 2003. www.ibm.com/developerworks/eserver/inproceedingss/archguide.html.

2. Arkaprava Basu , Jayneel Gandhi , Jichuan Chang , Mark  D. Hill , and Michael M. Swift. Efficient Virtual Memory for Big Memory Servers. In ISCA 2013 . Arkaprava Basu, Jayneel Gandhi, Jichuan Chang, Mark D. Hill, and Michael M. Swift. Efficient Virtual Memory for Big Memory Servers. In ISCA 2013.

3. Vasileios Karakostas , Osman  S. Unsal , Mario Nemirovsky , Adrian Cristal , and Michael Swift. Performance Analysis of the Memory Management Unit Under Scale-out Workloads. In IISWC 2014 . Vasileios Karakostas, Osman S. Unsal, Mario Nemirovsky, Adrian Cristal, and Michael Swift. Performance Analysis of the Memory Management Unit Under Scale-out Workloads. In IISWC 2014.

4. Thomas  W. Barr , Alan  L. Cox , and Scott Rixner . Translation Caching : Skip, Don’t Walk (the Page Table) . In ISCA 2010 . Thomas W. Barr, Alan L. Cox, and Scott Rixner. Translation Caching: Skip, Don’t Walk (the Page Table). In ISCA 2010.

5. Linux. 5 Level Paging. https://docs.kernel.org/x86/x86_64/5level-paging.html. Linux. 5 Level Paging. https://docs.kernel.org/x86/x86_64/5level-paging.html.

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