Wafer-to-Wafer Hybrid Bonding Challenges for 3D IC Applications
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9663571/9663865/09663937.pdf?arnumber=9663937
Reference3 articles.
1. Ultra-Fine Pitch 3D Integration Using Face-to-Face Hybrid Wafer Bonding Combined with a Via-Middle Through-Silicon-Via Process
2. Wafer Level Back to Back Hybrid Bonding for Multiple Wafer Stacking
3. Modelling and characterization on wafer to wafer hybrid bonding technology for 3D IC packaging
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. O.O: Optimized One-die Placement for Face-to-face Bonded 3D ICs;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
2. A New Evaluation Method of Bonding Strength Using Atomic Force Microscopy;2023 IEEE 25th Electronics Packaging Technology Conference (EPTC);2023-12-05
3. High-precision moiré alignment method using centrosymmetric grating for 3D interlayer interconnect;Optics and Lasers in Engineering;2023-12
4. Process Development and Integration for Wafer-to-Wafer Hybrid Bonding;2022 IEEE 24th Electronics Packaging Technology Conference (EPTC);2022-12-07
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