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Enhancing the Reliability of Wafer Level Packaging by Using Solder Joints Layout Design

  • Published:2006-12 Issue:4 Volume:29 Page:877-885
  • ISSN:1521-3331
  • Container-title:IEEE Transactions on Components and Packaging Technologies
  • language:
  • Short-container-title:IEEE Trans. Comp. Packag. Technol.

Author:

Liu Chang-Ming,Lee Chang-Chun,Chiang Kuo-Ning

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Small Database with an Adaptive Data Selection Method for Solder Joint Fatigue Life Prediction in Advanced Packaging;Materials;2024-08-17

2. A robust mesh size control technology suitable for various empirical equations for predicting solder joint reliability;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

3. High-Speed Thermo-Compression Sinter-Bonding Properties in Air of a Paste Containing Dendritic Cu Particles Having Oxalate Skins;Journal of Welding and Joining;2024-04-30

4. Sensitivity Study of Wafer-Level Packaging Lifetime Prediction Using Different Creep Constitutive Equations;2024 25th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE);2024-04-07

5. Use Artificial Neural Network to fit stress-strain curve of Chaboche model on lead-free solder SAC305;2023 18th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT);2023-10-25
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