A 32.9% PAE, 15.3 dBm, 21.6–41.6 GHz power amplifier in 65nm CMOS using coupled resonators

Author:

Jia Haikun,Prawoto Clarissa C.,Chi Baoyong,Wang Zhihua,Yue C. Patrick

Publisher

IEEE

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 4.4-6.4-GHz compact SiGe power amplifier with 30.5-dBm psat and 34.8% PAE based on triple-tank power combiner;IEICE Electronics Express;2023-12-25

2. A Driver Amplifier with Configurable Transformer-Based Matching Networks in 65-nm CMOS;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

3. A 23.5–32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology;2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD);2023-07-03

4. A Broadband Power Amplifier Covering 14-36 GHz in 65-nm CMOS Technology;2023 International Conference on Microwave and Millimeter Wave Technology (ICMMT);2023-05-14

5. A Power-Efficient 20–35-GHz MZM Driver With Programmable Linearizer for Analog Photonic Links in 28-nm CMOS;IEEE Transactions on Microwave Theory and Techniques;2023-03

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