Reviewing High-Radix Signed-Digit Adders-Reference-Cited by-同舟云学术

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Reviewing High-Radix Signed-Digit Adders

Published:2015-05-01 Issue:5 Volume:64 Page:1502-1505
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Kornerup Peter

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Link

http://xplorestaging.ieee.org/ielx7/12/7079452/06827919.pdf?arnumber=6827919

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Sparse Matrix-Vector Multiplication Based on Online Arithmetic;IEEE Access;2024

2. Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level;Lecture Notes in Computer Science;2024

3. Implementation of an Array Multiplier Using an Addition Algorithm with Signed Digit Representation;2023 7th International Conference On Computing, Communication, Control And Automation (ICCUBEA);2023-08-18

4. A Low-Power Ternary Adder Using Ferroelectric Tunnel Junctions;Electronics;2023-02-28

5. Accelerating Latency of Binary Division Through Vedic Methodology;Smart Trends in Computing and Communications: Proceedings of SmartCom 2020;2020-07-18

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