Sn Bumping Without Photoresist Mould and Si Dice Stacking for 3-D Packaging-Reference-Cited by-同舟云学术

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Sn Bumping Without Photoresist Mould and Si Dice Stacking for 3-D Packaging

Published:2010-11 Issue:4 Volume:33 Page:912-917
ISSN:1521-3323
Container-title:IEEE Transactions on Advanced Packaging
language:
Short-container-title:IEEE Trans. Adv. Packag.

Author:

Hong Sung Jun,Jun Ji Heon,Jung Jae Pil,Mayer Michael,Zhou Y. Norman

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/6040/5674140/05471122.pdf?arnumber=5471122

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process;Metals;2021-10-19

2. A review of soft errors and the low α-solder bumping process in 3-D packaging technology;Journal of Materials Science;2017-07-28

3. TSV Filling Technology using Cu Electrodeposition;Journal of Welding and Joining;2014-06-30

4. Various Cu Filling Methods of TSV for Three Dimensional Packaging;Journal of the Korean Welding and Joining Society;2013-06-30

5. Non-PR Sn-3.5Ag Bumping on a Fast Filled Cu-Plug by PPR Current;IEEE Transactions on Components, Packaging and Manufacturing Technology;2013-04

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