Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks-Reference-Cited by-同舟云学术

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Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks

Published:2016-05 Issue: Volume: Page:
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Container-title:2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)
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Author:

Kamakshi Divya Akella,Fojtik Matthew,Khailany Brucek,Kudva Sudhir,Zhou Yaping,Calhoun Benton H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7584313/7584876/07584895.pdf?arnumber=7584895

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Effective Timing Closure Using Improved Engineering Change Order Techniques in SOC Design;Wireless Personal Communications;2023-11

2. An Energy-Efficient Delay Insensitive Asynchronous Interface for Globally Asynchronous Locally Synchronous (GALS) System;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

3. A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET;2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2019-05

4. All‐digital delay line‐based time difference amplifier in 65 nm CMOS technology;IET Circuits, Devices & Systems;2019-04-30

5. Robustness to Voltage Noise With Ring Oscillator Clocks;IEEE Transactions on Nanotechnology;2019

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