Distributed Microarchitectural Protocols in the TRIPS Prototype Processor-Reference-Cited by-同舟云学术

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Distributed Microarchitectural Protocols in the TRIPS Prototype Processor

Published:2006-12 Issue: Volume: Page:
ISSN:1072-4451
Container-title:2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06)
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Author:

Sankaralingam Karthikeyan,Nagarajan Ramadass,McDonald Robert,Desikan Rajagopalan,Drolia Saurabh,Govindan M.S.,Gratz Paul,Gulati Divya,Hanson Heather,Kim Changkyu,Liu Haiming,Ranganathan Nitya,Sethumadhavan Simha,Sharif Sadia,Shivakumar Premkishore,Keckler Stephen,Burger Doug

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4041820/4041821/04041870.pdf?arnumber=4041870

Cited by 42 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory;IEEE Journal of Solid-State Circuits;2022-04

3. Effective runtime scheduling for high-performance graph processing on heterogeneous dataflow architecture;CCF Transactions on High Performance Computing;2020-07-28

4. CSMO-DSE;ACM Journal on Emerging Technologies in Computing Systems;2020-04-30

5. Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability;Transactions on High-Performance Embedded Architectures and Compilers V;2019

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