The Concept of Safe Operating Area for Gate Dielectrics: the SiC/SiO2 Case Study
Author:
Affiliation:
1. onsemi,Oudenaarde,Belgium,B-9700
2. onsemi,Kista,Sweden,16440
Funder
Flemish Government
Flanders Innovation & Entrepreneurship (VLAIO)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117802.pdf?arnumber=10117802
Reference9 articles.
1. Time Dependence of Bias-Stress-Induced SiC MOSFET Threshold-Voltage Instability Measurements
2. Threshold Voltage Instabilities of Present SiC-Power MOSFETs under Positive Bias Temperature Stress
3. Two-Way Tunneling Model of Oxide Trap Charging and Discharging in SiC MOSFETs
4. Investigation of Gate Leakage Current Behavior for Commercial 1.2 kV 4H-SiC Power MOSFETs
5. Gate Oxide Reliability Studies of Commercial 1.2 kV 4H-SiC Power MOSFETs
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1. Origin and Recovery of Negative VTH Shift on 4H–SiC MOS Capacitors: An Analysis Based on Inverse Laplace Transform and Temperature-Dependent Measurements;Materials Science in Semiconductor Processing;2024-07
2. Investigation on gate oxide reliability under gate bias screening for commercial SiC planar and trench MOSFETs;Materials Science in Semiconductor Processing;2024-05
3. 4H-SiC MOSFET Threshold Voltage Instability Evaluated via Pulsed High-Temperature Reverse Bias and Negative Gate Bias Stresses;Materials;2024-04-20
4. On the Intrinsic and Extrinsic Reliability Challenges of SiC MOSFETs;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14
5. Evaluation of Burn-in Technique on Gate Oxide Reliability in Commercial SiC MOSFETs;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14
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