Partially Isolated Dual Work Function Gate IGZO TFT With Obviously Reduced Leakage Current for 3D DRAMs-Reference-Cited by-同舟云学术

Partially Isolated Dual Work Function Gate IGZO TFT With Obviously Reduced Leakage Current for 3D DRAMs

Published:2024 Issue: Volume:12 Page:637-644
ISSN:2168-6734
Container-title:IEEE Journal of the Electron Devices Society
language:
Short-container-title:IEEE J. Electron Devices Soc.

Author:

Bao Yunjiao¹^ORCID,Yan Gangping¹^ORCID,Cao Lei¹^ORCID,Niu Chuqiao¹,Li Qingkun¹^ORCID,Sang Guanqiao¹^ORCID,Li Lianlian¹^ORCID,Wei Yanzhao¹^ORCID,Zhang Xuexiang¹^ORCID,Luo Jie¹^ORCID,Yang Yanyu¹,Xu Gaobo¹^ORCID,Yin Huaxiang¹^ORCID

Affiliation:

1. Key Laboratory of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences, Beijing, China

Funder

Strategic Priority Research Program of the Chinese Academy of Sciences

Joint Development Program of Semiconductor Technology Innovation Center, Beijing Corporation

Youth Innovation Promotion Association of the Chinese Academy of Sciences

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/6245494/10416702/10557586.pdf?arnumber=10557586

Reference25 articles.

1. 16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing

2. 17.4 A 14nm 1.1Mb embedded DRAM macro with 1ns access

3. Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays

4. Ultra Low Power 3D-Embedded Convolutional Neural Network Cube Based on α-IGZO Nanosheet and Bi-Layer Resistive Memory

5. Computing-In-Memory Using 1T1C Embedded DRAM Cell with Micro Sense Amplifier for Enhancing Throughput