Simulation Study of 4H-SiC High-k Pillar MOSFET With Integrated Schottky Barrier Diode
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology
Link
http://xplorestaging.ieee.org/ielx7/6245494/9359727/09552959.pdf?arnumber=9552959
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Performance enhancement of 4H-SiC superjunction trench MOSFET with extended high-K dielectric;Microelectronics Journal;2024-09
2. Wide Temperature Range Modeling of Implanted Resistors Based on 4H-SiC CMOS Process;IEEE Transactions on Electron Devices;2024-06
3. Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric;IET Power Electronics;2024-04-23
4. 4.87 kV SiC MOSFET Using HfSiOx/SiO2 Gate Dielectrics Combined with PN Pillars;Journal of Electronic Materials;2024-03-18
5. An UMOSFET integrated with graded semi-super-junction and 3C/4H–SiC hetero-crystalline freewheeling junction;Microelectronics Journal;2023-12
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