DUO: Exposing On-Chip Redundancy to Rank-Level ECC for High Reliability

Author:

Gong Seong-Lyong,Kim Jungrae,Lym Sangkug,Sullivan Michael,David Howard,Erez Mattan

Publisher

IEEE

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Counter-light Memory Encryption;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. Unity ECC: Unified Memory Protection Against Bit and Chip Errors;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2023-11-11

3. How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

4. Predicting Future-System Reliability with a Component-Level DRAM Fault Model;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

5. Construction of Cyclic Redundancy Check Codes for SDDC Decoding in DRAM Systems;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-02

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