Predicting Future-System Reliability with a Component-Level DRAM Fault Model

Author:

Jung Jeageun1ORCID,Erez Mattan2ORCID

Affiliation:

1. UT Austin; The university of Texas at Austin, USA

2. UT Austin; The university of Texas at Austin, United States of America

Funder

Semiconductor Research Corporation

Publisher

ACM

Reference55 articles.

1. 2015. DDR4 SDRAM. https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr4/8gb_ddr4_sdram.pdf 2015. DDR4 SDRAM. https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr4/8gb_ddr4_sdram.pdf

2. 2020. DDR5 SDRAM. https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr5/ddr5_sdram_core.pdf 2020. DDR5 SDRAM. https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr5/ddr5_sdram_core.pdf

3. 2022. Top500 Lists. http://www.top500.org/lists 2022. Top500 Lists. http://www.top500.org/lists

4. Basic concepts and taxonomy of dependable and secure computing

5. Majed Valad Beigi , Yi Cao , Sudhanva Gurumurthi , Charles Recchia , Andrew Walton , and Vilas Sridharan . 2023 . A Systematic Study of DDR4 DRAM Faults in the Field . In 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 991–1002 . Majed Valad Beigi, Yi Cao, Sudhanva Gurumurthi, Charles Recchia, Andrew Walton, and Vilas Sridharan. 2023. A Systematic Study of DDR4 DRAM Faults in the Field. In 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 991–1002.

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1. Investigating Memory Failure Prediction Across CPU Architectures;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S);2024-06-24

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