Rapid Inverse Design of GaN-on-GaN Diode with Guard Ring Termination for BV and (VFQ)−1 Co-Optimization
Author:
Affiliation:
1. San Jose State University,M-PAC Lab.,California,USA
2. CPES Virginia Tech,Virginia,USA
Funder
National Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10147163/10147396/10147511.pdf?arnumber=10147511
Reference15 articles.
1. A fast and elitist multiobjective genetic algorithm: NSGA-II
2. Normally-Off GaN HFET Based on Layout and Stress Engineering
3. Vertical GaN diode BV maximization through rapid TCAD simulation and ML-enabled surrogate model
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1. Device Image-IV Mapping using Variational Autoencoder for Inverse Design and Forward Prediction;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27
2. Automatic TCAD Model Parameter Calibration using Autoencoder;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27
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