Sleep switch dual threshold Voltage domino logic with reduced standby leakage current-Reference-Cited by-同舟云学术

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Sleep switch dual threshold Voltage domino logic with reduced standby leakage current

Published:2004-05 Issue:5 Volume:12 Page:485-496
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Kursun V.,Friedman E.G.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/28761/01291427.pdf?arnumber=1291427

Cited by 43 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Evaluation of dual-ONOFIC method for subthreshold leakage reduction in domino circuit;International Journal of Electronics;2023-11-08

2. Novel PVT Resilient Low-Power Dynamic XOR/XNOR Design Using Variable Threshold MOS for IoT Applications;IETE Journal of Research;2023-06-25

3. Influence of Gate Oxide and Subthreshold Leakage in Domino Using Si Nano-Materials;Silicon;2023-06-16

4. High Performance Energy-Efficient Leakage-Tolerant Dual Keeper Pseudo Domino Logic;International Journal on Applied Physics and Engineering;2023-05-31

5. Research on realizing low energy consumption using domino circuit;2nd International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2022);2022-04-25

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