A CAM with mixed serial-parallel comparison for use in low energy caches-Reference-Cited by-同舟云学术

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A CAM with mixed serial-parallel comparison for use in low energy caches

Published:2004-03 Issue:3 Volume:12 Page:325-329
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Efthymiou A.,Garside J.D.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/28629/01281803.pdf?arnumber=1281803

Cited by 22 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Match‐line control unit for power and delay reduction in hybrid CAM;IET Circuits, Devices & Systems;2021-02-21

2. Design and Analysis of Power Efficient Binary Content Addressable Memory (PEBCAM) Core Cells;Circuits, Systems, and Signal Processing;2017-08-30

3. A Comprehensive Review of Energy Efficient Content Addressable Memory Circuits for Network Applications;Journal of Circuits, Systems and Computers;2016-02-02

4. Low Leakage TCAM for IP Lookup Using Two-Side Self-Gating;IEEE Transactions on Circuits and Systems I: Regular Papers;2013-06

5. A Low-Power Ternary Content Addressable Memory With Pai-Sigma Matchlines;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2012-10

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