Built-in Jitter Measurement Circuit With Calibration Techniques for a 3-GHz Clock Generator-Reference-Cited by-同舟云学术

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Built-in Jitter Measurement Circuit With Calibration Techniques for a 3-GHz Clock Generator

Published:2011-08 Issue:8 Volume:19 Page:1325-1335
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Cheng Kuo-Hsing,Liu Jen-Chieh,Chang Chih-Yu,Jiang Shu-Yu,Hong Kai-Wei

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/5961215/05497216.pdf?arnumber=5497216

Cited by 19 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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3. DPLL-Based VRO of Time-to-Digital Converter;IEEE Solid-State Circuits Letters;2023

4. A 10 Gb/s On-chip Jitter Measurement Circuit Based on Transition Region Scanning Method;2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID);2022-02

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