Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
8 articles.
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1. Low Voltage Clock Tree Synthesis with Local Gate Clusters;Proceedings of the 2019 on Great Lakes Symposium on VLSI;2019-05-13
2. SLECTS: Slew-Driven Clock Tree Synthesis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-04
3. Slew Merging Region Propagation for Bounded Slew and Skew Clock Tree Synthesis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-01
4. Integrated Clock Mesh Synthesis With Incremental Register Placement;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2012-02
5. Robust Chip-Level Clock Tree Synthesis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2011-06