FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow-Reference-Cited by-同舟云学术

FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow

Published:2016-06 Issue:6 Volume:24 Page:2220-2233
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Chen Yao,Gurumani Swathi T.,Liang Yun,Li Guofeng,Guo Donghui,Rupnow Kyle^ORCID,Chen Deming

Funder

Research Grant for the Human-Centered Cyber-Physical Systems Programme within the Advanced Digital Sciences Center through the Agency for Science, Technology and Research, Singapore

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/7476004/07349212.pdf?arnumber=7349212

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