STT-BNN: A Novel STT-MRAM In-Memory Computing Macro for Binary Neural Networks

Author:

Pham Thi-Nhan1ORCID,Trinh Quang-Kien2ORCID,Chang Ik-Joon1ORCID,Alioto Massimo3

Affiliation:

1. Department of Electronics and Radio Engineering, Kyung Hee University, Yongin-si, South Korea

2. Department of Microprocessor Engineering, Faculty of Radio Electronics, Le Quy Don Technical University, Hanoi, Vietnam

3. Department of Electrical and Computer Engineering, National University of Singapore, Singapore

Funder

National Research & Development Program through the National Research Foundation of Korea

Ministry of Science and ICT

“CogniVision” and National Research Foundation Singapore

Vietnam National Foundation for Science and Technology Development

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Reference35 articles.

1. Learning multiple layers of features from tiny images;krizhevsky,2009

2. Neural network-hardware co-design for scalable RRAM-based BNN accelerators;kim;arxiv 1811 02187,2018

3. A Novel Framework to Estimate the Path Delay Variability On the Back of an Envelope via the Fan-Out-of-4 Metric

4. An MRAM-Based Deep In-Memory Architecture for Deep Neural Networks

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