A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications

Author:

Panahi Atiyehsadat,Balsalama Suhail,Ishimwe Ange-Thierry,Mbongue Joel Mandebi,Andrews David

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05

2. A Hardware Design Framework for Computer Vision Models Based on Reconfigurable Devices;ACM Transactions on Reconfigurable Technology and Systems;2024-01-15

3. HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-11

4. FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04

5. Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05

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