FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?-Reference-Cited by-同舟云学术

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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?

Published:2023-09-04 Issue: Volume: Page:
ISSN:
Container-title:2023 33rd International Conference on Field-Programmable Logic and Applications (FPL)
language:
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Author:

Kabir MD Arafat¹,Kabir Ehsan¹,Hollis Joshua¹,Levy-Mackay Eli¹,Panahi Atiyehsadat²,Bakos Jason³,Huang Miaoqing¹,Andrews David¹

Affiliation:

1. University of Arkansas,Department of Computer Science and Computer Engineering

2. University of South Carolina,Department of Computer Science and Computer Engineering

3. Cadence Design Systems,Department of Computer Science and Computer Engineering

Funder

National Science Foundation

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10296174/10296123/10296458.pdf?arnumber=10296458

Reference27 articles.

1. Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era

2. PIM-enabled instructions

3. ComputeDRAM

4. FloatPIM

5. Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks

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