A Dynamic Gate Driver IC with Automated Pattern Optimization for SiC Power MOSFETs
Author:
Affiliation:
1. University of Toronto,The Edward S. Rogers Sr. Dept. of Electrical and Computer Eng,Toronto,Canada
2. Fuji Electric Co. Ltd,Japan
3. Taiwan Semiconductor Research Institute,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9813543/9813532/09813625.pdf?arnumber=9813625
Reference6 articles.
1. Predicting SiC MOSFET Behavior Under Hard-Switching, Soft-Switching, and False Turn-On Conditions
2. Modular Multilevel SOI-CMOS Active Gate Driver Architecture for SiC MOSFETs
3. A Smart Gate Driver IC for GaN Power HEMTs With Dynamic Ringing Suppression
4. Slope Sensing for Optimum Dynamic Gate Driving of SiC Power MOSFETs
5. A Survey of Wide Bandgap Power Semiconductor Devices
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1. On the Damping of Ringing Affecting Power Transistors by Means of Active Gate Drivers;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04
2. 2-Level Miller Detection-Based High Side Gate Driver Design for Power MOSFETs;2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2023-11-19
3. SiC MOSFET High Side Gate Driver Design Using HV CMOS Process;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06
4. Digital Gate Driver IC with Real-Time Gate Current Change by Sensing Drain Current to Cope with Operating Condition Variations of SiC MOSFET;2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia);2023-05-22
5. Dynamic Gate Drive for SiC Power MOSFETs with Sub-nanosecond Timings;2023 IEEE Applied Power Electronics Conference and Exposition (APEC);2023-03-19
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