An Evolutionary Normalization Algorithm for Signed Floating-Point Multiply-Accumulate Operation

Author:

Sarma Rajkumar,Bhargava Cherry,Kotecha Ketan

Publisher

Computers, Materials and Continua (Tech Science Press)

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Modeling and Simulation,Biomaterials

Reference38 articles.

1. Pipelined and clock gated MAC architecture design and implementation;Dhindsa;Far East Journal of Electronics and Communications,2016

2. A novel low power multiply–accumulate (MAC) unit design for fixed point signed numbers;Babu;Advances in Intelligent Systems and Computing,2016

3. A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications;Ananthalakshmi;Microprocessors and Microsystems,2017

4. Design and analysis of low power hybrid adder;Jayaprakash;Journal of Theoretical and Applied Information Technology,2013

5. A MUX based signed-floating-point MAC architecture using UCM algorithm;Sarma;Bulletin of the Polish Academy of Sciences: Technical Sciences,2020

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