A Novel Low Power Multiply–Accumulate (MAC) Unit Design for Fixed Point Signed Numbers-Reference-Cited by-同舟云学术

A Novel Low Power Multiply–Accumulate (MAC) Unit Design for Fixed Point Signed Numbers

Published:2016 Issue: Volume: Page:675-690
ISSN:2194-5357
Container-title:Advances in Intelligent Systems and Computing
language:
Short-container-title:

Author:

Jithendra Babu N.,Sarma Rajkumar

Publisher

Springer India

Link

http://link.springer.com/content/pdf/10.1007/978-81-322-2656-7_62

Reference12 articles.

1. Shanthala S, Kulkarni SY. VLSI design and implementation of low power MAC unit with block enabling technique. Eur J Sci Res. ISSN 1450-216X.

2. Kharate AB, Grumble PR. VLSI design and implementation of low power mac for digital FIR filter. Int J Electr Commun Comput Eng. 4(2) REACT-2013, ISSN 2249071X.

3. Sen A, Mitra P, Data D. Low power mac unit for DSP processor. Int J Recent Technol Eng (IJRTE). 1(6);ISSN: 2277–3878, January 2013.

4. Abdelgawad A. Low power multiply accumulate unit (MAC) for future wireless sensor networks. 978-1-4673-4637-5/13/ 2013 IEEE.

5. Deepak S, Kailath BJ. Optimized MAC unit design. 978-1-4673-5696-1/12/ 2012 IEEE.

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Evolutionary Normalization Algorithm for Signed Floating-Point Multiply-Accumulate Operation;Computers, Materials & Continua;2022

2. Application of ameliorated Harris Hawks optimizer for designing of low-power signed floating-point MAC architecture;Neural Computing and Applications;2021-01-16

3. A MUX based signed-floating-point MAC architecture using UCM algorithm;Bulletin of the Polish Academy of Sciences Technical Sciences;2020-07-15