Affiliation:
1. Department of Electronic Engineering, The Chinese University of Hong Kong, Hong Kong, China
Abstract
A novel switched-current successive approximation ADC is presented in this paper with high speed and low power consumption. The proposed ADC contains a new high-accuracy and power-efficient switched-current S/H circuit and a speed-improved current comparator. Designed and simulated in a 0.18-μm CMOS process, this 8-bit ADC achieves 46.23 dB SNDR at 1.23 MS/s consuming 73.19 μW under 1.2 V voltage supply, resulting in an ENOB of 7.38-bit and an FOM of 0.357 pJ/Conv.-step.
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Cited by
4 articles.
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