Pipelined-Scheduling of Multiple Embedded Applications on a Multi-Processor-SoC

Author:

Salamy Hassan1,Aslan Semih2

Affiliation:

1. Electrical and Computer Engineering, University of Saint Thomas, 2115 Summit Ave, Saint Paul, MN 55105, USA

2. Ingram School of Engineering, Texas State University, 601 University Dr., San Marcos, TX 78666, USA

Abstract

Due to clock and power constraints, it is hard to extract more power out of single core architectures. Thus, multi-core systems are now the architecture of choice to provide the needed computing power. In embedded system, multi-processor system-on-a-chip (MPSoC) is widely used to provide the needed power to effectively run complex embedded applications. However, to effectively utilize an MPSoC system, tools to generate optimized schedules is highly needed. In this paper, we design an integrated approach to task scheduling and memory partitioning of multiple applications utilizing the MPSoC system simultaneously. This is in contrast to the traditional decoupled approach that looks at task scheduling and memory partitioning as two separate problems. Our framework is also based on pipelined scheduling to increase the throughput of the system. Results on different benchmarks show the effectiveness of our techniques.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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