High-PSR Capacitorless LDO with Adaptive Circuit for Varying Loads
Author:
Affiliation:
1. School of Electronics Engineering, Vellore Institute of Technology, Vandalur-Kelambakkam Road, Chennai 600127, Tamil Nadu, India
Abstract
Publisher
World Scientific Pub Co Pte Lt
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture
Link
https://www.worldscientific.com/doi/pdf/10.1142/S0218126620501789
Reference19 articles.
1. A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection
2. A CMOS Low Noise, Chopper Stabilized Low-Dropout Regulator With Current-Mode Feedback Error Amplifier
3. Full On-Chip CMOS Low-Dropout Voltage Regulator
4. PSR Enhancement Through Super Gain Boosting and Differential Feed-Forward Noise Cancellation in a 65-nm CMOS LDO Regulator
5. External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4–4 MHz Range
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1. Double-OTA External Capless Low-power LDO Regulator with Enhanced PSR and Transient Response;2023 5th Iranian International Conference on Microelectronics (IICM);2023-10-25
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3. A low power external capacitor‐less low drop‐out regulator with low over/undershoot voltage and high PSR;International Journal of Circuit Theory and Applications;2023-06-29
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