AC-Stress Degradation in SiC MOSFETs

Abstract

This work presents very recent results regarding threshold-voltage (VT) degradation due to the application of an AC gate-bias stress (also known as a gate-switching stress). We show that this phenomenon includes both a seemingly-permanent VT shift and an increase in the observed VT hysteresis. This degradation effect is found primarily in trench-geometry devices when exposed to what can be described as a negative bias overstress that exceeds the negative bias rating of the device, but that not all trench devices are equally susceptible, suggesting that device design and processing details are critical in limiting the severity of this effect.