Influence of Processing and of Material Defects on the Electrical Characteristics of SiC-SBDs and SiC-MOSFETs

Author:

Fukuda Kenji1,Kinoshita Akimasa1,Ohyanagi Takasumi1,Kosugi Ryouji1,Sakata T.2,Sakuma Y.1,Senzaki Junji1,Minami A.3,Shimozato Atsushi1,Suzuki Takuma4,Hatakeyama Tetsuo1,Shinohe Takashi4,Matsuhata Hirofumi1,Yamaguchi Hiroshi1,Nagai Ichiro1,Harada Shinsuke1,Ichinoseki Kyoichi5,Yatsuo Tsutomu6,Okumura Hajime1,Arai Kazuo1

Affiliation:

1. National Institute of Advanced Industrial Science and Technology (AIST)

2. R&D Association for Future Electron Devices

3. AIST/ PERC

4. Toshiba Corporation

5. R and D Partnership for Future Power Electronics Technology (FUPET)

6. National Institute of Advanced Industrial Science and Technology, AIST

Abstract

The influences of processing and material defects on the electrical characteristics of large-capacity (approximately 100A) SiC-SBDs and SiC-MOSFETs have been investigated. In the case of processing defects, controlled activation annealing is the most important factor. On the other hand for material defects, the number of epitaxial defects must be decreased to zero for both SBDs and MOSFETs. The dislocation defects in SiC wafers are dangerous for the breakdown voltage of MOSFETs. However, they are not killer defects. If the epitaxial defect density is sufficiently low and the dislocation density is in the order of 10000cm-2, the long- term reliability of the gate oxide at the electric field of 3MV/cm can be guaranteed.

Publisher

Trans Tech Publications, Ltd.

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

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