Complementary JFET Logic for Low-Power Applications in Extreme Environments

Abstract

The static and dynamic characteristics of Complementary JFET (CJFET) logic inverter are studied across a range of temperatures and supply voltages to assess potential improvements in performance of digital logic functions for operation in extreme environments. The logic inverter is truly the core of all digital designs. The design and analysis of inverter enables the design of more complex structures, such as NAND, NOR and XOR gates. These complex structures in turn form the building blocks for modules, such as adders, multipliers and microprocessors. At 500 deg C and operating at a supply voltage of 1 V, the CJFET inverter have noise margin comparable to that of room temperature silicon and silicon on insulator CMOS inverters. Furthermore, the static power dissipation by CJFET inverter at 500 deg C is 20.6 nW which is six orders of magnitude lower than that by current SiC technologies, making CJFET technology ideal for achieving complex logic functions, far greater than a few-transistors ICs, in the nearer term.