Affiliation:
1. Graduate School of Enginnering, Nagasaki University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software
Reference16 articles.
1. [1] K. Dohi, K. Fukumoto, Y. Shibata, and K. Oguri, “Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator,” ReConFig, pp.1-6, 2013.
2. [2] High-Performance Computing Using FPGAs, ed. W. Vanderbauwhede and K. Benkrid, Springer, New York, 2013.
3. [3] Impulse Accelerated Technologies, “Impulse C,” http://www.impulseaccelerated.com/
4. [4] Xilinx, “Vivado HSL Design,” http://www.xilinx.com/products/design-tools/vivado/integration/esl-design/index.htm
5. [5] Accellera Systems Inititaive, “System C,” http://www.accellera.org/home
Cited by
7 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Minimal Path Delay Leading Zero Counters on Xilinx FPGAs;Computational Science – ICCS 2023;2023
2. Crossbar Implementation with Partial Reconfiguration for Stream Switching Applications on an FPGA;Parallel Computing: Technology Trends;2020-03-20
3. Scalability Analysis of Deeply Pipelined Tsunami Simulation with Multiple FPGAs;IEICE Transactions on Information and Systems;2019-05-01
4. Design Examples;Design of FPGA-Based Computing Systems with OpenCL;2017-10-26
5. Automatic Optimization of OpenCL-Based Stencil Codes for FPGAs;Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing;2017-06-24