An Efficient Resource Shared RISC-V Multicore Architecture-Reference-Cited by-同舟云学术

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An Efficient Resource Shared RISC-V Multicore Architecture

Published:2022-09-01 Issue:9 Volume:E105.D Page:1506-1515
ISSN:0916-8532
Container-title:IEICE Transactions on Information and Systems
language:en
Short-container-title:IEICE Trans. Inf. & Syst.

Author:

ISLAM Md Ashraful¹,KISE Kenji¹

Affiliation:

1. School of Computing, Tokyo Institute of Technology

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Link

https://www.jstage.jst.go.jp/article/transinf/E105.D/9/E105.D_2021EDP7248/_pdf

Reference36 articles.

1. [1] T. Mitra, “Heterogeneous multi-core architectures” Information and Media Technologies vol.10, no.3, pp.383-394, 2015. 10.11185/imt.10.383

2. [2] P. Yiannacouras, J. Rose, and J.G. Steffan, “The microarchitecture of FPGA-based soft processors,” Proc. 2005 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, pp.202-212, 2005. 10.1145/1086297.1086325

3. [3] C. Heinz, Y. Lavan, J. Hofmann, and A. Koch, “A catalog and in-hardware evaluation of open-source drop-in compatible RISC-V softcore processors,” 2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig), pp.1-8, IEEE, Dec. 2019. 10.1109/reconfig48160.2019.8994796

4. [4] R. Dolbeau and A. Seznec, “CASH: Revisiting hardware sharing in single-chip parallel processors,” J. Instr. Level Parallelism, vol.6, 2004.

5. [5] D. Sheldon, R. Kumar, F. Vahid, D. Tullsen, and R. Lysecky, “Conjoining soft-core FPGA processors,” 2006 IEEE/ACM International Conference on Computer Aided Design, pp.694-701, 2006. 10.1109/iccad.2006.320015

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Resource-efficient RISC-V Vector Extension Architecture for FPGA-based Accelerators;Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies;2023-06-14

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