A Catalog and In-Hardware Evaluation of Open-Source Drop-In Compatible RISC-V Softcore Processors

Author:

Heinz Carsten,Lavan Yannick,Hofmann Jaco,Koch Andreas

Publisher

IEEE

Cited by 34 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Designing Low-Power RISC-V Multicore Processors With a Shared Lightweight Floating Point Unit for IoT Endnodes;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. NIRVANA: Non-Invasive Real-Time VulnerAbility ANAlysis for RISC-V Processor;2024 IEEE International Conference on Omni-layer Intelligent Systems (COINS);2024-07-29

3. Designing an IEEE-Compliant FPU that Supports Configurable Precision for Soft Processors;ACM Transactions on Reconfigurable Technology and Systems;2024-04-30

4. Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3;2024-04-27

5. DANSEN: Database Acceleration on Native Computational Storage by Exploiting NDP;ACM Transactions on Reconfigurable Technology and Systems;2024-04-04

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