A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators
Author:
Affiliation:
1. Division of Electrical, Electronic and Information Engineering, Osaka University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/transele/E95.C/8/E95.C_1427/_pdf
Reference13 articles.
1. [1] M.-Y. Choi, S.-N. Lee, S.-B. You, W.-S. Yeum, H.-J. Park, J.-W. Kim, and H.-S. Lee, “A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control,” IEEE Custom Integrated Circuits Conf. (CICC), pp.89-92, Sept. 2008.
2. [2] P.W. Bosshart, “A multiplexed switched-capacitor filter bank,” IEEE J. Solid-State Circuits, vol.SC-15, no.6, pp.939-945, Dec. 1980.
3. [3] P.C. Yu and H.S. Lee, “A 2.5-V, 12-b, 5-Msample/s pipelined CMOS ADC,” IEEE J. Solid-State Circuits, vol.31, no.12, pp.1854-1861, Dec. 1996.
4. [4] D. Kanemoto, T. Ido, and K. Taniguchi, “A novel third order delta sigma modulator with one opamp shared among three integrator stages,” IEICE Electron. Express, vol.5, no.24, pp.1088-1092, 2008.
5. [5] D. Kanemoto, T. Ido, and K. Taniguchi, “A 7.5mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique,” Proc. IEEE International SoC Design Conference (ISOCC), pp.66-69, Nov. 2011.
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