A Single Opamp Third-Order Low-Distortion Delta-Sigma Modulator with SAR Quantizer Embedded Passive Adder-Reference-Cited by-同舟云学术

A Single Opamp Third-Order Low-Distortion Delta-Sigma Modulator with SAR Quantizer Embedded Passive Adder

Published:2014 Issue:6 Volume:E97.C Page:526-537
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

CHAO I-Jen¹,HOU Ching-Wen¹,LIU Bin-Da¹,CHANG Soon-Jyh¹,HUANG Chun-Yueh²

Affiliation:

1. Department of Electrical Engineering, National Cheng Kung University

2. Department of Electrical Engineering, National University of Tainan

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E97.C/6/E97.C_526/_pdf

Reference25 articles.

1. [1] J. Koh, Y. Chio, and G. Gomez, “A 66dB DR 1.2V 1.2mW single-amplifier double-sampling 2nd-order ΔΣ ADC for WCDMA in 90nm CMOS,” IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers., pp.170-171, Feb. 2005.

2. [2] Y. Fujimoto, Y. Kanazawa, P.L. Re, and M. Miyamoto, “An 80/100MS/s 76.3/70.1dB SNDR ΔΣ ADC for digital TV receivers,” IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers., pp.76-77, Feb. 2006.

3. [3] L. Bos, G. Vandersteen, P. Rombouts, A. Geis, A. Morgado, Y. Rolain, G.V. Plas, and J. Ryckaert, “Multirate cascaded discrete-time low-pass ΔΣ modulator for GSM/Bluetooth/UMTS,” IEEE J. Solid-State Circuits, vol.45, no.6, pp.1198-1208, June 2010.

4. [4] E. Bilhan and F. Maloberti, “A wideband sigma-delta modulator with cross-coupled two-paths,” IEEE Trans. Circuits Syst. I, vol.56, no.5, pp.886-893, May 2009.

5. [5] N. Maghari and U. Moon, “A third-order delta-sigma modulator using noise-shaped bi-directional single-slop quantizer,” IEEE J. Solid-State Circuits, vol.46, no.12, pp.2882-2891, Dec. 2011.

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