A 0.31 pJ/Conversion-Step 12-Bit 100 MS/s 0.13 .MU.m CMOS A/D Converter for 3G Communication Systems-Reference-Cited by-同舟云学术

A 0.31 pJ/Conversion-Step 12-Bit 100 MS/s 0.13 .MU.m CMOS A/D Converter for 3G Communication Systems

Published:2009 Issue:9 Volume:E92-C Page:1194-1200
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

KIM Young-Ju¹,LEE Kyung-Hoon¹,LEE Myung-Hwan¹,LEE Seung-Hoon¹

Affiliation:

1. Dept. of Electronic Engineering, Sogang University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://www.jstage.jst.go.jp/article/transele/E92.C/9/E92.C_9_1194/_pdf

Reference15 articles.

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2. [2] T. Ito, D. Kurose, T. Yamaii, and T. Itakura, “55-mW 1.2-V 12-bit 100-MSPS pipeline ADCs for wireless receivers, ” Proc. Eur. Solid-State Circuits Conf., pp.540-543, Sept. 2006.

3. [3] T.N. Andersen, B. Hernes, A. Briskemyr, F. Telsto, J. Bjornsen, T.E. Bonnerud, and O. Moldsvor, “A 97mW 110MS/s 12-bit pipeline ADC implemented in 0.18μm digital CMOS, ” Proc. Design, Automation and Test in Europe, vol.3, pp.219-222, March 2005.

4. [4] H.C. Choi, Y.J. Kim, S.W. Lee, J.Y. Han, O.B. Kwon, Y.L. Kim, and S.H. Lee, “A 52mW 0.56mm² 1.2V 12-bit 120MS/s SHA-free dual-channel nyquist ADC based on mid-code calibration, ” Proc. IEEE Int. Symp. Circuits and Systems, pp.9-12, May 2008.

5. [5] P. Bogner, F. Kuttner, C. Kropf, T. Hartig, M. Burian, and E. Hermann, “A 14b 100MS/s digitally self-calibrated pipelined ADC in 0.13μm CMOS, ” ISSCC Dig. Tech Papers, pp.832-841, Feb. 2006.

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