A 24-bit sigma-delta ADC with configurable chopping scheme
Author:
Affiliation:
1. State Key Laboratory of ASIC and System, Fudan University
2. School of Electronic Science and Applied Physics, Hefei University of Technology
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/elex/16/10/16_16.20190176/_pdf
Reference30 articles.
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2. [2] H. Li, et al.: “Novel single-loop multi-bit sigma-delta modulator using OTA sharing technique without DEM,” IEICE Electron. Express 8 (2011) 2041 (DOI: 10.1587/elex.8.2041).
3. [3] J. Garcia, et al.: “On continuous time incremental sigma-delta ADCs with extended range,” IEEE Trans. Instrum. Meas. 62 (2013) 60 (DOI: 10.1109/TIM.2012.2212597).
4. [4] K. Yamamoto and A. Carusone: “A 1-1-1-1 MASH delta-sigma modulator using dynamic comparator-based OTAs,” IEEE J. Solid-State Circuits 47 (2012) 1866 (DOI: 10.1109/JSSC.2012.2196732).
5. [5] Y. Chae and G. Han: “Low power sigma-delta modulator using class-C inverter,” IEEE Symposium on VLSI Circuits (2007) 240 (DOI: 10.1109/VLSIC.2007.4342734).
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