Low power logic BIST with high test effectiveness-Reference-Cited by-同舟云学术

Low power logic BIST with high test effectiveness

Author:

Wang Weizheng¹,Liu Peng²,Cai Shuo¹²,Xiang Lingyun¹

Affiliation:

1. College of computer and communication Engineering, Changsha University of Science and Technology

2. College of Information Science & Engineering, Hunan University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

Reference12 articles.

1. [1] K. M. Butler, J. Saxena, A. Jain, T. Fryars, J. Lewis and G. Hetherington: IEEE International Test Conference (2004) 355.

2. [2] J. Saxena, K. M. Butler, V. B. Jayaram and S. Kundu: IEEE International Test Conference (2003) 1098.

3. [3] M. Elm, H. Wunderlich, M. E. Imhof, C. G. Zoellin, J. Leenstra and N. Maeding: ACM Design Automation Conference (2008) 828.

4. [4] X. Lin and J. Rajski: IEEE Asian Test Symp. (2008) 329.

5. [5] S. Wang and S. K. Gupta: IEEE Trans. Computer-Aided Design Integr. Circuits Syst. 25 (2006) 1565.

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献