High-Throughput Electron Beam Direct Writing of VIA Layers by Character Projection with One-Dimensional VIA Characters
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Published:2013
Issue:12
Volume:E96.A
Page:2458-2466
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ISSN:0916-8508
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Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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language:en
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Short-container-title:IEICE Trans. Fundamentals
Author:
IKENO Rimon1, MARUYAMA Takashi2, KOMATSU Satoshi1, IIZUKA Tetsuya3, IKEDA Makoto1, ASADA Kunihiro1
Affiliation:
1. VLSI Design and Education Center (VDEC), The University of Tokyo 2. e-Shuttle, Inc. 3. Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing
Reference20 articles.
1. [1] H.C. Pfeiffer, “Variable spot shaping for electron-beam lithography,” J. Vac. Sci. Technol., vol.15, no.3, pp.887-890, March 1978. 2. [2] H.C. Pfeiffer, “Recent advances in electron-beam lithography for the high-volume production of VLSI devices,” IEEE Trans. Electron Devices, vol.ED-26, no.4, pp.663-674, April 1979. 3. [3] A. Yamada, H. Yasuda, and M. Yamabe, “Electron beams in individual column cells of multicolumn cell system,” J. Vac. Sci. Technol., B, vol.26, no.6, pp.2025-2031, Nov./Dec. 2008. 4. [4] R. Inanami, S. Magoshi, S. Kosai, M. Hamada, T. Takayanagi, K. Sugihara, K. Okumura, and T. Kuroda, “Throughput enhancement strategy of maskless electron beam direct writing for logic device,” Proc. 2000 IEEE International Electron Devices Meeting, pp.833-836, Dec. 2000. 5. [5] M. Sugihara, T. Takata, K. Nakamura, R. Inanami, H. Hayashi, K. Kishimoto, T. Hasebe, Y. Kawano, Y. Matsunaga, K. Murakami, and K. Okumura, “Cell library development methodology for throughput enhancement of character projection equipment,” IEICE Trans. Electron., vol.E89-C, no.3, pp.377-383, March 2006.
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