1. [1] J.L. Levant, M. Ramdani, R. Perdriau, and M. Drissi, “EMC assessment at chip and PCB level: Use of the ICEM model for jitter analysis in an integrated PLL, ” IEEE Trans. Electromagn. Compat., vol.49, no.1, pp.182-191, Feb. 2007.
2. [2] “IEC 62433-2 FDV — EMC IC Modeling part 2: Models of integrated circuits for EMI behavioural simulation — Conducted emission modeling, ” Tech. Rep., International Electrotechnical Commission, 2008.
3. [3] F. Lafon, O. Maurice, F. de Daran, C. Lochot, and S. Calvet, “Exploitation of the ICEM model in an automotive application, ” 4th International Workshop on Electromagnetic Compatibility of Integrated Circuits — EMC COMPO 04 — Angers, 2004.
4. [4] R. Neumayer, A. Stelzer, F. Haslinger, G. Steinmair, M. Tröscher, J. Held, B. Unger, and R. Weigel, “Numerical EMC simulation for automotive application, ” Proc. EMC Zurich 2003 Symposium, 2003.
5. [5] A. Boyer, S. Bendhia, and E. Sicard, “Modelling of a direct power injection aggression on a 16-bit microcontroller buffer, ” Proc. EMC COMPO 07, Torino, Italy, 2007.