Non-isothermal simulation of SiC DMOSFET short circuit capability

Abstract

Abstract The short circuit (SC) capability is a crucial figure of merit for a power switching device in applications such as electrical vehicle traction inverters and chargers. SiC DMOSFETs are inferior to insulated gate bipolar transistors in terms of the SC withstand time. In this work, the SC capability of a SiC DMOSFET is investigated through non-isothermal simulations and measurements. Its sensitivity to process-induced channel length variability has been examined. Its dependence on important device design parameters has been studied, revealing the JFET width as the most sensitive amongst them for optimizing the SC capability. Previously reported SC enhancement techniques that require added fabrication steps were corroborated.