1. Progress and benchmarking of CMOS-Device technologies;Wakabayashi
2. Vertically-stacked nanowire/FinFETs and following 2D FETs for logic chips;Wakabayashi
3. 1.1 Moore’s Law: a path going forward;Holt
4. Subband structure engineering for performance enhancement of Si MOSFETs;Takagi
5. Experimental study on carrier transport mechanism in ultrathin-body SOI n- and p-MOSFETs with SOI thickness less than 5 nm;Uchida