Hot Carrier Effect in Low-Temperature poly-Si p-ch Thin-Film Transistors under Dynamic Stress
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Link
http://stacks.iop.org/1347-4065/41/i=1A/a=L13/pdf
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Gate Voltage Pulse Rising Edge Dependent Dynamic Hot Carrier Degradation in Poly-Si Thin-Film Transistors;IEEE Electron Device Letters;2021-11
2. Effect of Dynamic Bias Stress in Short-Channel (L=1.5 µm) p-Type Polycrystalline Silicon Thin-Film Transistors;Japanese Journal of Applied Physics;2012-02-01
3. Effect of Dynamic Bias Stress in Short-Channel ($L=1.5$ $\mu$m) p-Type Polycrystalline Silicon Thin-Film Transistors;Japanese Journal of Applied Physics;2012-01-16
4. Influence of mechanical bending and temperature on the threshold voltage instability of a-Si:H thin-film transistors under electrical stress;Solid-State Electronics;2011-09
5. Gate Bias Instability under Light Irradiation in Polycrystalline Silicon Thin-Film Transistors;Japanese Journal of Applied Physics;2010-03-23
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