Designing Network On-Chip Architectures in the Nanoscale Era
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Chapman and Hall/CRC
Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core Architectures;ACM Journal on Emerging Technologies in Computing Systems;2023-06-30
2. The Need for 2-Phase Design Paradigms in High-Throughput GALS Network-On-Chip Architectures;2022 RIVF International Conference on Computing and Communication Technologies (RIVF);2022-12-20
3. Interconnect Architectures for 3D Technologies;3D Interconnect Architectures for Heterogeneous Technologies;2022
4. Maximal Connectivity Test with Channel-Open Faults in On-Chip Communication Networks;Journal of Electronic Testing;2020-04-27
5. Design of a Virtual Channel Router Architecture for Low Power on Mesh-of-Grid Topology for Network on Chip;Applied Soft Computing and Communication Networks;2020
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