Author:
Gu Xun,Nemoto Takaneo,Teramoto Akinobu,Ito Takashi,Sugawa Shigetoshi,Ohmi Tadahiro
Abstract
Damage reduction during planarization is strongly required to avoid scratch generation leading to yield loss in an integrated circuit fabrication especially after implementation of ultra low-k dielectrics in Cu damascene structure. By analyzing contact characteristic on the advanced non-porous ultra low-k dielectric, fluorocarbon film, brush scrubbing at high rotation rate and low down pressure is proposed to satisfy both particle removal efficiency and scratch reduction in post CMP cleaning. Shear force increases with increasing in brush rotation rate because of enlargement of pressured area which is generated by fluid flow. Enhancement of contribution of fluid flow by increasing brush rotation rate with lowering down force to particle removable efficiency can be direction for future low-k compatible process.
Publisher
The Electrochemical Society
Cited by
20 articles.
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