Heterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment

Author:

Waldron Niamh,Nguyen Ngoc Duy,Lin Dennis,Brammertz Guy,Vincent Benjamin,Firrincieli Andrea,Winderick Gillis,Sioncke Sonja,De Jaeger Brice,Wang Gang,Mitard Jerome,Wang Wei-E,Heyns Marc,Caymax Matty,Meuris Marc,Absil Philippe,Hoffmann Thomas

Abstract

We report on the fabrication of MOS capacitors on 200 mm virtual GaAs substrates using a Si CMOS processing environment. The fabricated capacitors were comparable to those processed on bulk GaAs material. Topside contact was made to the GaAs using a novel CMOS compatible self-aligned NiGe contact scheme resulting in a measured contact resistance of 0.26 Ω.cm. Cross-contamination from various III-V substrates was investigated and it was found that by limiting the thermal budget to ≤ 300C cross-contamination from the outgassing of In, Ga and As could be eliminated. For wet processing the judicious choice of recipe and processing conditions resulted in no significant cross-contamination being detected as determined by TXRF monitoring. This achievement enables III-V device production using state-of-the-art Si processing equipment.

Publisher

The Electrochemical Society

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