Author:
Nakashima Hiroshi,Yamamoto Keisuke,Yang Haigui,Wang Dong
Abstract
Ge is of great interest as a candidate channel material for future CMOS devices due to its high intrinsic carrier mobility. To translate this potential into CMOS, high-quality gate-stack and source/drain (S/D) junction formations are essential. We fabricated Ge n- and p-MOSFETs using the gate-stack formation by bilayer (SiO2/GeO2) passivation and using S/D junction formations by thermal diffusion of P and ion implantation of B. The electron and hole channel mobilities of the fabricated MOSFETs were 1097 and 376 cm2V-1s-1, respectively, despite the very thin GeO2 thickness. We will present the detailed fabrication method and device performance.
Publisher
The Electrochemical Society
Cited by
3 articles.
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